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Burn-in test PCB (Printed Circuit Board)

Burn-in test PCB

0.5mm pitch through hole PCB for fine pitch CSP burn-in test applications in mass production.

  • SMT type LSI socket can be applied with Via in PAD structure.
  • Electroless gold plating provide durability for repeated assembly and repair operation.
  • High current burn-in design solution is available by using our simulation capability that can analyze temperature behavior of wiring in the board.

Wiring specification at 0.5mm pitch pad distribution area

Via pitch : 0.5mm [mm]
Type of mounting Through hole Filled via
FIN diameter φ0.150 φ0.100
Drill diameter φ0.250 φ0.200
Surface Land diameter φ0.420
Line width Layout disabled
Pad-Line space Layout disabled
Inner layer Land diameter φ0.450
Line width 0.080
Pad-Line space Layout disabled
Hole-Line space 0.085
relief diameter 口0.420
Solder mask relief diameter
of Via in Pad
Area
Total thickness
(included solder mask)
t ≦1.6 1.6< t <3.0
  1. We recommend copper plating or electroless gold plating as the surface finishing.
  2. In the case of 0.5mm via pitch specification, the through hole structure can be used for board thickness of and under 1.6mm and filled surface via hole structure can be used for board thickness of more than 1.6 mm less than 3.0mm.
 Surface
Surface

Except the most outsided pads in the 0.5mm pitch pad array, the trace can not be connected to pads on the surface layer.

 Inner layer (signaling layer)
Inner layer(signaling layer)

When trace is placed between 0.5mm pitch vias, the pad can be placed only the point where the trace connected to via.


Applications

  • Burn-in test device


Bob Shaghafi

Tel: +1-408-737-5970
Fax: +1-408-737-5993
E-mail:FICTinfo@fma.fujitsu.com